Lengths of lines on a computer circuit board may affect the signals passing through the system. For example, system buses often run a number of lines in parallel. The lengths of the lines, however, may cause a delay between the times when the signals arrive.
In order to minimize the length induced delay between the different elements of the bus, layout considerations have been used. For example, trial and error techniques may be used to fine tune the signal paths, to allow signals to arrive in synchronism.
Extra lengths, such as serpentines, may be added at different areas on the layout.